Saturday, April 29, 2017

Building add-on cards for the RC2014

Spencer Owen's RC2014 Z80 microcomputer kit is a great starter platform for learning about digital electronics and microprocessors.

Although the Z80 microprocessor in the design is more than 40 years old, having been introduced in the 1970s, the basic concepts still apply in today's world of Raspberry Pis, Arduinos and smartphones.

The RC2014 is based on Grant Searle's "Z80 Computer on 7 chips". Spencer implemented that design in several modules (CPU, memory, clock, serial i/o) and a number of backplane options. Yes, folks, we have a new industry standard bus!!

This provides for a lot of flexibility. You can swap out the basic set of modules for enhanced versions, for example. Spencer has released new versions of the original RAM, ROM and CPU modules with new features. He has also introduced a Pro version of the backplane that adds the additional Z80 signals that were missing from the original backplane design.

I had worked with digital circuits design in past lives both professionally and as a hobbyist. I had also laid out printed circuit boards. So I took to Eagle like duck to water when I decided to redesign Bernd Ulman's Z80_mini.

For the uninitiated, PCB design is pretty addictive. It's like knitting and solving puzzles at the same time.

As can be expected, I didn't stop with the Z80_mini RevB. I went on to design a new RC2016 UART board and a new/improved Z80 processor card.

The 16550 UART board

The original RC2014 serial i/o module is based on the Motorola 68B50. This part was meant for use with Motorola processors and will work fine with 65xx type processors as well. Its bus interface, particularly the use of a bus clock signal (the E signal), limits its flexibility with other types of processors. That Grant was able to put the 6850 with a Z80 running at 7.3728MHz is testimonial to his genius.

The ancientness of the 6850 ACIA also means that it is a very simple device. Newer UARTs like the 16550 have much better performance in terms of maximum line rate (e.g. 1.5Mbps), bus access speeds and enhanced features like on-chip FIFO that reduces the overhead on the main processor.

The Z80_mini board uses the 16550 UART and I was able to run it at 115200 baudrate along with the Z80 running at 20MHz!

The other nice thing about the 16550 UART is its agnostic nature relative to the type of processor. This opens up the door for the use of other microprocessor families in the RC2014.

The current 16550 UART board for the RC2014 has been tested (altho' usual legal disclaimers will apply). It is available from OSH Park at the link below. The Eagle source files can be found on GitHub. The schematic is here. A BIOS along with the ROM images for Monitor/Debugger with/without BASIC can also be found on GitHub under the source and rom folders respectively.

The default port address ranges used are 80H-FFH. Interrupts are supported. However, I did not use an open-collector driver on the INT signal line. This means that the board is cannot be used in conjunction with other UART boards e.g. the original 68B50 (which also uses port address 80H) or SMBaker's SIO boards. A new board design is in the works to resolve some of these limitations.

Note also that the BIOS will configure the UART for 115200 baud operation assuming a 1.8432MHz oscillator.

Parts used are the following:
- Capacitors: all 0.1uF
- DIP14 oscillator
- 16550 or 16C550, the auto-flow control of the 16C550 is not implemented in software
- 6-pin FTDI pin header, angled. A straight pin version will probably lead to fit problems with other cards on the backplane.
- 74HCT04
- Sockets: 40-pin, 14-pin and I also use one for the oscillator

An enhanced Z80 CPU board

If I have one complaint about the original RC2014 design, is that it is based on a minimum part count philosophy. So there is no power-on reset circuit: you probably have to hit the reset button after connecting power. The processor clock is also used to derive the serial i/o baud rate: this means that it is hard to experiment with different microprocessor speeds e.g if you want to turbo charge the Z80 to run it at 20MHz!

This is one reason why I like the Z80_mini: there's a reset circuit and it is designed for two crystal oscillators: one for the 16550 UART and the other drives the Z80. With the Z80_mini, I can run the Z80 at 20MHz and still get 115200 baud from the UART.

The enhanced Z80 board (branded the "Z80 CPU+") presented here aims to solve both the reset and separate clock issues.

The reset circuit is a standard one with an RC+diode combo and a couple of Schmitt triggers. A pushbutton allows for a manual reset. For those who asked, the diode is to drain the capacitor quickly on power cycle.

The INTR and WAIT signals have pull up resistors. The latter is for an eventual wait state generator in case you want to run the Z80 at 20MHz and still be able to use slow peripherals. A jumper option allows you to connect the oscillator output to the CLK signal on the RC2014 bus.

You can see from the picture that I am running a 20MHz Z80 with a 14.31818MHz clock.

The picture below shows the full set up with a 5-slot backplane:

The Z80 card is on the left, followed by the 64KB RAM module, the 16550 UART card and then the Pageable ROM module on the right. The FTDI cable is connected to the UART card and I am using an external 5V power supply.

You can use the CPU card with all existing RC2014 software.

As usual, the source Eagle files are available on GitHub. Boards can be ordered from OSH Park by clicking on the logos below. The schematic is here.

Parts used are:
- Decoupling capacitors: 0.1uF
- Reset capacitor: 10uF to 22uF
- 1N4148 diode
- 10K resistor for the reset circuitry
- 3.3K resistors for R2, R3
- Z80
- DIP14 Oscillator
- 74HCT14
- Reset switch
- Sockets: 40-pin, 14-pin and 14-pin footprint for the oscillator.

16550 UART board:
Order from OSH Park

Enhanced Z80 board:
Order from OSH Park

Saturday, April 22, 2017

RC2014 Pageable ROM with a 28C256 EEPROM

This quick article shows how to configure the RC2014 Pageable ROM module for use with a 28C256 EEPROM.

The RC2014 kit was designed for use with a 27C512 EPROM/ROM device.

If your method of software development is write-burn-test-fail-repeat then a 27C512 device is not for you, even if you were using the EPROM version: UV erase does take a bit of time.

Enter the 28C256 EEPROM device. This 32KB device is electrically erasable and programmable. Which means that if you are at "fail" in your development cycle, just plunk it back into the device programmer and write in a new version of the code (after having electrically erase it, of course, which takes only a few seconds).

Unfortunately, the geniuses who came up with the 28C256 decided to not use a standard (JEDEC) or compatible pin-out. As a result, if you were to compare the 28C256 with its EPROM equivalent, the 27C256, you will find that Pin 1 and 27 are swapped.

In the 28C256, Pin 1 is A14, and Pin 27 has to be tied high (Vcc). This is the reverse of the 27C256.

On my RC2016 Mini, I had to do a rewire.

Fortunately, Spencer designed the Pageable ROM module to be a lot more versatile. And all you need to do is to make sure that the jumpers are set correctly.

The following picture shows the jumper setting I use for "Page Selection". Note that A14 is set to 1 and A15 to 0.

Next is the page size selection. Since I am running the Monitor/Debugger+BASIC, I need a page of 16KB.

Friday, April 21, 2017

The Z80_mini Rev B

I had previously written about how to set up the standard Z80_mini for use with an FTDI-style USB-Serial cable.

This article will describe what else I have done with the Z80_mini.

To recap, the Z80_mini is a little Z80-based single board computer designed by Bernd Ulmann and described in some detail on his website. I like the simplicity, flexibility and completeness of the design, including the use of a 16550 UART, arguably one of the best old-style UARTs out there, a generous use of decoupling capacitors and separate crystal oscillators for the UART baudrate and CPU clock.

Best of all, Bernd has made the Eagle design files available on this website. Which leads to very interesting possibilities.

First of all, I was able to send the .brd file to OSH Park to get myself a set of (3) professionally produced Z80_mini PCBs.

Second, while I was able to, with some minor modifications to the board, adapt it for use with an FTDI USB-serial cable, I could go even further than that.

Eventually, I decided to redesign parts of the Z80_mini PCB. Hence the Z80_mini Rev B!!!

The original Z80_mini is on the right. The redesign Rev B design is on the right.

A picture of an assembled board is below.

The obvious changes are the elimination of (a) the power connector, (b) the circuitry around the MAX232 and serial connector and (c) the addition of the 6-pin FTDI connector.

The less obvious changes are the addition of jumpers to allow the use of 28C256 EEPROMs, a little pin header to bring out the OUT1 and OUT2 signals of the UART e.g. for an audio output perhaps...

The hidden changes involve adding the M1 signal to the UART chipselect, wiring the CTS line to ground (in case a 16C550 is used and we want to run the UART with autoflow control) and of course, routing the RTS signal to the FTDI connector.

Using 74ACT devices, 55ns RAM, 150ns EEPROM and a 20MHz Z80, I've been able to run the board at the full 20MHz spec of the CPU. Instead of Bernd's original 1.8432MHz UART clock, I chose to use a 7.3728MHz clock instead and ran the serial port at 115200 a la RC2014.

This is a very speedy Z80 indeed!

For the adventurous, the Eagle board design files are in GitHub. Z80 assembly language source files are available for a BIOS+Monitor/Debugger+BASIC combo at GitHub. A binary can be found in the rom/ folder if you don't want to muck around with a cross-assembler.

Finally, you can directly order boards at OSH Park with the link below.

Do note that I do not get any money from OSH Park should you decide to order a set of boards through them. The project sharing at OSH Park is primarily so that you don't have to load the .brd files yourself.

Order from OSH Park

Sunday, April 16, 2017

The Glitch Works' 8085 Single Board Computer

The Glitch Works' 8085-based Single Board Computer is another one of those cool little projects using ancient technology.

This time, it is the 8-bit 8085 from Intel (although second sourced/copied by a number of other manufacturers). The 8085 is the descendent of the 8080, arguably the microprocessor that kickstarted the personal computer revolution.

The Glitch Works very generously provides the full Eagle board and schematic files for the project via GitHub.

Of course I had to grab them (the rev2 version) and send off the brd file to OSH Park for a set of PCBs.

The design is done the way I like, i.e. relatively conservative with a good use of decoupling capacitors. The ROM circuitry is very configurable: you can use a straight-up 27256-style EPROM or a 28C256 EEPROM (the pin-outs are different). There's even a power-on reset circuit.

A 40-pin connector provides for system expansion. At first glance, I thought that only the I/O ports were available, but Glitch Works pointed out that all I needed was an address latch to get the lower address lines from the data lines. Duh!

I didn't like a couple of things in the design (there's always something, isn't there?), the first is the choice of connection for power (a 0.1" dual pin header) which will require work to use with commonly available power supplies e.g. the ubiquitous 2.1x5.5 barrel plug. The second is the grounding of the 8085's SID signal line.

The latter is one of the nice things of the 8085 vs a lot of other microprocessors of the era. The SID and the companion SOD signals can be easily set up for use as a simple serial port. Of course, it will also be software driven and not very fast.

However, considering that The Glitch Works' 8085 board doesn't come with any other peripheral devices, the availability of both signals would have enabled a real, fully-functional single board computer.

As it is, I had to carefully slice the SID pad to separate it from the ground plane. Then I hacked together a little daughter to provide for an FTDI connector.

The FTDI cable also provides the 5V power supply to the board. Although with a non-CMOS 8085, we are pushing the current-limits of the FTDI cable...!

As you can see in the picture, I am using a real-life ancient ceramic 8085A. This is one that is made by NEC.

Yet another picture:

Ancient hardware is useless without useful and sufficiently ancient software. So I grabbed Donn Stewart's adaptation of Li-Chen Wang's Palo Alto Tiny Basic and adapted it for use with this contraption.

Instead of using a UART for the serial input/output, I use the SID/SOD lines to drive a baud rate of 2400.

This gives us a fully functional 8085 computer without the need for an additional peripheral card. Sweet!

The source code for the Tiny Basic adaptation can be found here. It assumes a crystal of 6.144MHz and 32KB RAM.

Saturday, April 8, 2017

Using a FTDI USB-Serial connection with the Z80_mini

The Z80_mini is another minimalist, Grant Searle-style Z80-based single board computer.

Its creator, Bernd Ulmann, was generous enough to make the Eagle PCB files available on his website. I went ahead and had a set (of 3) made with OSH Park.

You can tell that the Z80_mini is a pre-Arduino design: (a) the power supply connector is the type used in PC-era floppy/hard drives, (b) there is a MAX232 and a 10-pin connector for a traditional RS232 interface.

I was able to make a little tweak to use an FTDI-style serial interface along with power routing from the FTDI connector.

The theory behind this is illustrated in the following picture:

As you can see, Pins 11, 12 and 15 of the MAX232 matches the similar signal pins of the typical FTDI header.

So if you were to insert a 6-pin header from pins 10 to 15 of the MAX232 location, you will essentially have an FTDI interface. The following pictures shows how this will look.

The FTDI cable plugs in as shown in the following picture. The GND line is the black one on the right.

If you want to power the Z80_mini board from the FTDI connector, all you need to do is to wire a link from pin 13 of the MAX232 (or pin 3 from the FTDI header) to the nearest VCC signal, for example, on pin 14 of the 74xx14 chip.

The only caveats with this arrangement are:
a. You're not using the RTS line. In fact, this is not connected from the 16550 at all
b. You'll want to make sure that you use low power chips to not overload your FTDI adapter

Otherwise, voila!

I really like the Z80_mini design and will write another blog about what else I've done with it.

Sunday, April 2, 2017

16KB ROM on the RC2014

Spencer Owen's RC2014 Mini is a nifty little Z80-based computer.

Spencer ships it with a 64KB ROM containing Grant Searle's BIOS and rendition of MS BASIC. Since the Z80 supports only 64KB of memory space in total, the 64KB ROM is split into 8KB pages. The BIOS+BASIC resides in the bottom-most 8KB page.

I had taken Grant's BIOS, mated it with a heavily modified version of Josh Bensadon's Monitor program and then appended John Kerr's inline disassembler to create the Monitor/Debugger for the RC2014. This all took up close to 3KB of ROM (I used a 32KB AT28C256 device).

MS BASIC would take up close to an additional 8KB of ROM.

So I had to find a way to tweak the RC2014 to decode the ROM space as 16KB pages. In this way, I would be able to fit the Monitor/Debugger plus BASIC into the 16KB space.

This was done in a 4-step process.

Step 1: Lift pins 11, 12, 13 of U1 (74HCT32 on the RC2014 Mini). This will prevent the ROM address decoder from using the A13 line.

Step 2: Remove the S1 jumper. This will leave the A13 pin of the ROM chip available.

Step 3: Flip the board around, and short pins 11 and 12 of U1. We are passing the output signal of the U1C gate to the ROM chip select pin.

Step 4: Wire link from pin 13 to the middle pin of jumper S1. Alternatively, you can wire to pin 26 of the ROM chip (U6). This is to wire the A13 address line from the Z80 CPU to the ROM chip.

And voila, you have now enabled 16KB of ROM space from 0000H to 3FFFH.

The Monitor/Debugger + BASIC ROM image is available from GitHub here. Grab the "monbas.rom" file.