This time, it is the 8-bit 8085 from Intel (although second sourced/copied by a number of other manufacturers). The 8085 is the descendent of the 8080, arguably the microprocessor that kickstarted the personal computer revolution.
The Glitch Works very generously provides the full Eagle board and schematic files for the project via GitHub.
Of course I had to grab them (the rev2 version) and send off the brd file to OSH Park for a set of PCBs.
The design is done the way I like, i.e. relatively conservative with a good use of decoupling capacitors. The ROM circuitry is very configurable: you can use a straight-up 27256-style EPROM or a 28C256 EEPROM (the pin-outs are different). There's even a power-on reset circuit.
A 40-pin connector provides for system expansion. At first glance, I thought that only the I/O ports were available, but Glitch Works pointed out that all I needed was an address latch to get the lower address lines from the data lines. Duh!
I didn't like a couple of things in the design (there's always something, isn't there?), the first is the choice of connection for power (a 0.1" dual pin header) which will require work to use with commonly available power supplies e.g. the ubiquitous 2.1x5.5 barrel plug. The second is the grounding of the 8085's SID signal line.
The latter is one of the nice things of the 8085 vs a lot of other microprocessors of the era. The SID and the companion SOD signals can be easily set up for use as a simple serial port. Of course, it will also be software driven and not very fast.
However, considering that The Glitch Works' 8085 board doesn't come with any other peripheral devices, the availability of both signals would have enabled a real, fully-functional single board computer.
As it is, I had to carefully slice the SID pad to separate it from the ground plane. Then I hacked together a little daughter to provide for an FTDI connector.
The FTDI cable also provides the 5V power supply to the board. Although with a non-CMOS 8085, we are pushing the current-limits of the FTDI cable...!
As you can see in the picture, I am using a real-life ancient ceramic 8085A. This is one that is made by NEC.
Yet another picture:
Ancient hardware is useless without useful and sufficiently ancient software. So I grabbed Donn Stewart's adaptation of Li-Chen Wang's Palo Alto Tiny Basic and adapted it for use with this contraption.
Instead of using a UART for the serial input/output, I use the SID/SOD lines to drive a baud rate of 2400.
This gives us a fully functional 8085 computer without the need for an additional peripheral card. Sweet!
The source code for the Tiny Basic adaptation can be found here. It assumes a crystal of 6.144MHz and 32KB RAM.
Hi,
ReplyDeleteNice work on the glitch works board. I've just got a few PCB's made with the gerber files for Rev 2 board what EEPROM did you use.? what it a AT29C265 or a AT28C256.?
I can not seem to get mine working yet with the Tiny ROM basic supplied.
Did you need to make any other mods to the board other than cutting away the ground plane from pin 5 (SID).
Kind regards
Vernon
Unfortunately, the geniuses who came up with the 28C256 decided to not use a standard (JEDEC) or compatible pin-out.
ReplyDeleteThey use exactly a JEDEC standard pinout; see figure 3.7.5-4 on page 3.7.5-8 of JEDEC Standard No. 21-C §3.7.5 Byte Wide TTL and MOS SRAM (login required). If you look at the 62256 SRAM that's no doubt on a board nearby, you'll see it's exactly the same.
Now there are probably some good arguments to be made that they should have used a ROM pinout rather than a RAM pinout, but on the other hand that EEPROM is much more similar in behaviour to RAM than ROM, to the point where it might be better thought of as non-volatile RAM with very slow writes. In particular, it requires no erase before writes to previously programmed addresses (unlike all EPROMs that I'm aware of) and can also be can be erased/written on a single-byte basis (unlike many EPROMs).
I can see certain ways in which this could make development easier. For example, you could use a battery-backed SRAM in your "ROM area" for initial development (to make loading new images images faster) and then switch to 28xxx parts (which are still in-system programmable, but more slowly) in the same socket for later development and production. You'll probably want a jumper, too, that lets you change between passing the write signal to the chip and holding it de-asserted.
(Sorry if there are multiple posts of this; the preview button tells me that it just published the comment, and neither button seems actually to make a comment appear.)